Riverlane
Overview
Builds the quantum error correction stack — real-time decoders that process error syndromes faster than new errors accumulate. Hardware-agnostic software that works across superconducting, trapped ion, and neutral atom platforms.
Key Milestones
- 2016: Founded by Dr. Steve Sherbin from University of Cambridge
- 2023: Raised $75M Series C
- 2024: Demonstrated real-time QEC decoding with Rigetti on 84-qubit processor
- 2025: Partnered with multiple hardware vendors for cross-platform QEC
- 2026: Deltaflow decoder operating at microsecond latencies on real hardware
Technology Approach
Riverlane builds the error correction stack — the software layer that detects and corrects qubit errors in real time. Their Deltaflow decoder processes error syndromes (the diagnostic data from quantum error correction codes) fast enough to keep up with the error rate of the hardware.
This is a critical piece of infrastructure. Error correction only works if the decoder can process syndrome data faster than new errors accumulate — typically within microseconds. A slow decoder is worse than no error correction at all.
Hardware Agnostic
Riverlane’s software works across multiple hardware platforms (superconducting, trapped ion, neutral atom). This positions them as a universal component in the quantum stack — whoever wins the hardware race, they still need error correction software.
Competitive Position
Strengths: Focused on the hardest and most important software problem in quantum computing. Hardware-agnostic means they benefit from any hardware progress. Strong Cambridge research pedigree.
Challenges: Competing against hardware vendors’ internal QEC teams (Google, IBM). Dependent on hardware reaching error rates where QEC becomes viable.